Semiconductor memory devices typically include a memory cell array wherein a particular memory cell is erased, programmed or read by providing appropriate voltages to word lines via an word line decoder and bit lines via a bit line decoder. In semiconductor memory devices, such as flash memory devices utilizing a single bit or multi-bit memory cell having an insulative charge trapping layer for storing information, high voltage is required to erase, program or read such information from or into the memory cell. Drain pumps and similar high voltage generating circuits are utilized to provide high voltage and/or high current for such semiconductor memory operation. For example, in such semiconductor memory devices, drain pumps are used to provide high voltage and high current for erasing data, programming (or writing) data, reading data, and verifying whether sufficient write/erase has been performed on a subject memory cell at the time of erasing or writing data. Typically, drain pumps include large capacitors. Thus, the drain pumps take time to ramp up to a targeted high voltage level. While an insulative charge trapping layer enables multi-bit per cell semiconductor memory devices as well as improves non-volatility of such memory devices, it is preferable that such memory devices improve performance by providing high speed erasing, programming and reading operations, particularly activating and deactivating bit lines for memory cell access. This is especially true of high performance semiconductor memory devices such as NAND-type memory devices or memory devices operating as NAND-type memories. Given the ramping limitations of conventional high voltage generating devices, it is difficult for many semiconductor memory devices to provide erase, program and read operations of sufficient speed to operate as NAND-type memories.
Accordingly, it is desirable to provide a method and apparatus for high speed, high voltage operation for a high performance semiconductor memory device. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description of the invention and the appended claims, taken in conjunction with the accompanying drawings and this background of the invention.